Toward fault-tolerant quantum computing with bosonic codes at March Meeting 2024
March is always an exciting time for physics and quantum computing!
A lot of interesting work has been going on at Nord Quantique over the last year, which is why we’re thrilled to present our progress toward fault-tolerent quantum computing with bosonic codes at the APS March Meeting 2024.
Presentation Summary
W47.010: Bosonic Pauli+: Efficient Simulation of Concatenated GKP Codes
W47.011: Towards a second layer of quantum error correction for Gottesman-Kitaev-Preskill states
Congratulating previous work by Sandoko Kosen:
D49.001: Building superconducting quantum processors in flip-chip architecture
Meet with our team in March Meeting.
If you would like to
- talk about some of the great work being done around the exciting field of bosonic codes in quantum computing
- learn more about Nord Quantique
- hear about job opportunities with us (check out our job board as well !)
- simply spend time with a bunch of passionate people!
Reach out to info@nordquantique.ca and we'll arrange an onsite meeting for you.
March Meeting Abstracts
W47.010: Bosonic Pauli+: Efficient Simulation of Concatenated GKP Codes
Thu. March 7, 4:48 p.m. – 5:00 p.m. CST – Room 200CD
Presenter: Florian Hopfmueller
A promising route towards fault-tolerant error correction is the concatenation of a Gottesman-Kitaev-Preskill (GKP) code with a qubit code. Development of such concatenated codes requires simulation tools which realistically model noise, while being able to simulate the dynamics of many modes. However, so far, large-scale simulation tools for concatenated GKP codes have been limited to idealized noise models and GKP code implementations. Here, we introduce the Bosonic Pauli+ model (BP+), which can be simulated efficiently for a large number of modes, while accurately capturing the rich dynamics in the bosonic multi-mode Hilbert space for a realistic finite-energy GKP code stabilized with the sBs protocol, with given physical decoherence rates. BP+ relies on a new decomposition of the GKP Hilbert space into a logical and an error subsystem, which we call the sBs basis. Confidence in the accuracy of BP+ is gained by comparing predictions of BP+ and full time evolution simulations, for several deep quantum circuits of interest. Using BP+, logical error rates of a concatenated code implementation are presented. BP+ may also be applicable to other bosonic codes.
W47.011: Towards a second layer of quantum error correction for Gottesman-Kitaev-Preskill states
Thu. March 7, 5:00 p.m. – 5:12 p.m. CST – Room 200CD
Presenter: Dany Lachance-Quirion
Approaches based on bosonic codes hold the promise of easing the requirements on the number of modes needed for fault-tolerant quantum computing compared with ones based on two-level systems. The finite-energy Gottesman-Kitaev-Preskill (GKP) code is of particular interest, as highlighted by recent experiments demonstrating an increase of its logical lifetime from quantum error correction (QEC) in superconducting devices [1-3]. Nevertheless, a second layer of quantum error correction will likely be required to reach the error rates necessary for useful quantum computation [4]. An important step in that direction is the demonstration of operations in an architecture involving multiple GKP qubits. Here, we present experimental progress on the implementation of a building block composed of a syndrome unit connected to two data units, each hosting an encoded GKP qubit.
[1] P. Campagne-Ibarcq et al., Nature, 584, 368 (2019).
[2] V. V. Sivak et al., Nature, 616, 55 (2023).
[3] D. Lachance-Quirion et al., arXiv:2310.11400 (2023).
[4] A. L. Grimsmo and S. Puri, PRX Quantum, 2, 020101 (2021).
D49.001: Building superconducting quantum processors in flip-chip architecture
Mon. March 4, 3:00 p.m. – 3:36 p.m. CST – Room 200G
Presenter: Sandoko Kosen
State-of-the-art superconducting quantum processors heavily leverage the multi-chip architecture to enable larger and more complex circuitry. The challenge is to ensure that such an architecture does not degrade the device performance as we continue to scale to larger systems.
At the Chalmers University of Technology (Sweden), we employ a two-chip stack architecture where a qubit chip is flip-chip-bonded to a control chip. In a successful collaboration with VTT (Finland), we demonstrated flip-chip qubit devices with coherence and gate fidelity performances that are similar to our in-house single-chip devices. We have further scaled this integration technology to fully-packaged multi-qubit processors and demonstrated control-signal crosstalk with favourable behaviour.
In this talk, I will describe this flip-chip approach and highlight recent advances from the community. In particular, I will focus on lessons we learned from building quantum processors using this architecture: from design of single qubit all the way to the on-chip signal-delivery strategy, and discuss the technical challenges that lie ahead.